MOSFET UIS and avalanche energy analysis - Power Circuit - Circuit Diagram

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Inductance

In the datasheet of a power MOSFET, parameters like single-pulse avalanche energy EAS, avalanche current IAR, and repetitive pulse avalanche energy EAR are commonly listed, yet many electronic engineers often overlook these specifications and their implications in power system designs. These parameters play a critical role in determining the reliability and performance of a power system, especially under unclamped inductive switching conditions. This article aims to clarify the significance of these parameters and explore their practical applications and impacts in real-world scenarios.

Defining and Measuring EAS, IAR, and EAR
The avalanche energy of a MOSFET is closely tied to its thermal characteristics and operational state. Ultimately, it reflects the rise in temperature, which depends on both the power level and the thermal properties of the silicon package. The thermal response of a power semiconductor to rapid power pulses (lasting 100-200 microseconds) can be described by Equation 1:
(1)
Here, A represents the silicon die area, and the constant K is related to the thermal performance of the silicon. From Equation 1, we derive:
(2)
Where tav is the pulse duration. When measuring avalanche energy at low currents over extended periods, the power dissipated will raise the device's temperature, and the failure current is determined by the peak temperature reached. If the device is sufficiently robust to ensure that the temperature does not surpass the maximum allowable junction temperature, the measurement can continue. During this process, the junction temperature typically increases from 25°C to TJMAX, while the ambient temperature remains constant at 25°C, and the current is usually set at 60% of the ID. The avalanche voltage VAV is approximately 1.3 times the device’s rated voltage.

Avalanche energy is generally measured under unclamped inductive switching (UIS) conditions. Among these, there are two key values: EAS and EAR. EAS refers to the single-pulse avalanche energy, defining the maximum energy the device can handle in a single avalanche state; EAR is the repetitive pulse avalanche energy. The avalanche energy depends on the inductance value and the initial current level.

Figure 1 illustrates the EAS measurement circuit and waveforms for VDD decoupling. In this setup, Q1 serves as the driving MOSFET, DUT is the MOSFET being tested, L is the inductance, and D is the freewheeling diode. Both the test MOSFET and the driving MOSFET are turned on simultaneously, applying the power supply voltage VDD to the inductor, which excites and linearly increases its current. After the conduction time tp, the inductor current reaches its maximum value; subsequently, both MOSFETs are turned off. At this point, due to the inductor’s current not being able to change abruptly, the freewheeling diode D turns on to maintain the original current magnitude and direction.

Figure 1 EA Decoupled EAS Measurement Diagram

Once D turns on, the parasitic capacitance between the MOSFET’s DS terminals forms a resonant loop with the inductor L and CDS, causing the inductor current to decrease and the voltage across CDS to rise until the inductor current reaches zero, at which point D naturally turns off. The energy stored in L should ideally be fully transferred to CDS.

Assuming an inductance L of 0.1mH, IAS=10A, and CDS=1nF, theoretically, the voltage VDS would be:
CDSVDS2=LIAS2 (3)
VDS=3100V

However, such a high voltage value is unrealistic. Observing the actual waveform, the DS region of the MOSFET acts like an anti-parallel diode. With a reverse voltage applied across the diode, it enters the reverse operating area. As the VDS voltage increases, it clamps near the corresponding Zener diode voltage, V(BR)DSS, where the voltage stabilizes rather than rising further. At this stage, the MOSFET operates in the avalanche region, and V(BR)DSS is the avalanche voltage. For a single pulse, the energy delivered to the MOSFET equals the avalanche energy EAS:

EAS=LIAS2/2 (4)

Moreover, since the avalanche voltage exhibits a positive temperature coefficient, when some cells within the MOSFET experience a temperature increase, their withstand voltage also rises. Consequently, cells with lower temperatures automatically balance out, allowing more current to flow and increasing the temperature to boost the avalanche voltage. Additionally, the measured value depends on the avalanche voltage, which varies with temperature during demagnetization.

Returning to our earlier question, how do we determine IAS? Given a fixed inductance, is it influenced by tp? For a MOSFET device, IAS must first be established. In the circuit depicted in Figure 1, after selecting the inductor, the current is progressively increased until the MOSFET is irreparably damaged, at which point the current value is divided by 1.2 or 1.3 (a derating factor of 70% or 80%). This current value is IAS. Notably, once IAS and L are fixed, tp is also determined.

Traditionally, the circuit diagram and waveform for measuring EAS are shown in Figure 2. Observe that the final VDS voltage does not drop to zero but instead aligns with VDD, meaning some energy is not converted into avalanche energy.

Figure 2 Traditional EAS Measurement Chart

In the off-state region, the triangular area in Figure 2(b) represents energy. Regardless of VDD, the demagnetization voltage is VDS, and the actual demagnetization voltage is VDS-VDD, leading to the following expression for avalanche energy:
(5)
For low-voltage devices, VDS-VDD becomes quite small, introducing significant errors and limiting the applicability of this measurement circuit in such cases.

Presently, different companies employ varying standards for measuring inductance. For low-voltage MOSFETs, most companies are now using 0.1mH inductors. It’s generally observed that higher inductance values reduce the avalanche current but increase the measured avalanche energy because the inductance grows, slowing the current rise and providing the chip more time to dissipate heat. However, this approach introduces challenges related to dynamic thermal resistance and heat capacity, topics we’ll discuss further.