Learn adc signal conditioning circuit design, you only need to grasp these knowledge points

After reading this article, you can gain valuable insights into highly reusable software design principles and development ideas for interface programming. It encourages you to focus on your own "core domain," refine your programming mindset, and achieve mutual growth for both the enterprise and the individual. The second chapter is titled **"ADC Signal Conditioning Circuit Design"**, covering sections **2.1 Application Background** and **2.2 Circuit Design**. This chapter guides developers in understanding the challenges of analog circuit design. Many developers lack detailed knowledge about the design aspects of analog circuits, which often requires significant investment in equipment and expert guidance. While semiconductor companies provide reference materials, key points are still unclear, leading to uncertainty among developers. For MCU suppliers, the information provided tends to be more focused on digital circuits and basic software, with little practical application guidance for analog circuits. This knowledge, though not part of the core domain, takes considerable time and effort to master. To address this, we have standardized the peripheral circuits required for various ADCs within MCUs, aiming to elevate industry design standards. With proper methods, even complex requirements can be handled efficiently. --- ### 2.1 Application Background #### 2.1.1 Nominal Accuracy The LPC824 features a 12-bit SAR ADC with up to 12 input channels and multiple internal and external trigger inputs, offering a sample rate of up to 1.2MS/s. The key parameters listed in the manual are comparable to those of independent ADC chips. However, in practical applications, users often report poor internal ADC accuracy, which is typically due to improper external circuit design. #### 2.1.2 Peripheral Circuit As shown in Figure 2.1, the sampling system using the LPC82x internal ADC requires support from a reference source, power supply, drive circuit, and signal conditioning circuit. These components significantly impact ADC performance. #### 2.1.3 Interference Source Most integrated ADCs in MCUs are SAR type, using a switched capacitor structure that makes them susceptible to interference. The internal structure of a typical SAR ADC is illustrated in Figure 2.2. Understanding its working principle helps identify potential interference paths. During the conversion process, the ADC repeatedly distributes the input signal across capacitors in the weight array. Any noise on the reference or power supply can affect the comparator, indirectly causing instability in the output data. --- ### 2.2 Circuit Design Improving the accuracy of the internal SAR ADC involves eliminating interference on each valid input port, as shown in Figure 2.4. According to the influence on accuracy, the design of the voltage reference circuit accounts for 80% of the workload, low-noise analog power supply for 5%, input transient drive for 5%, and other anti-interference measures for 10%. #### 2.2.1 Reference Source The reference voltage directly affects the ADC's digital output, requiring low noise, low output impedance, and good temperature stability. A standardized circuit is shown in Figure 2.5. The NCP431 is used as a low-cost reference chip with an output noise of 10uVpp and an output impedance of 0.2Ω. The large capacitor C2 on the VREF pin is not a bypass capacitor but a storage capacitor essential for ADC operation. #### 2.2.2 Low Noise Analog Power Supply A low-noise power supply is essential to avoid interference from the power port. Using the ripple rejection ratio of a linear regulator, a low-noise power supply can be obtained from a standard switching power supply, as shown in Figure 2.9. The SPX1117 is used for its good ripple rejection ratio, with a fast drop after 100kHz. The linear regulator should be placed close to the MCU, and the digital power supply should be isolated if possible. #### 2.2.3 Transient Drive The SAR ADC input has an instantaneous charging process during sampling. If the signal source impedance and internal sampling capacitor are not properly managed, the ADC may not achieve optimal precision. An op-amp and RC combination circuit is used to improve this, as shown in Figure 2.11. Adding a resistor between the op-amp and ADC prevents capacitive load issues, ensuring stable operation. #### 2.2.4 Input Signal Filtering An active filter is implemented in the standardized circuit to suppress unwanted interference. A third-order Bessel filter is used, as shown in Figure 2.13, with a cutoff frequency of 9kHz. Op-amps used in the filter must have low noise and good power supply rejection. The LMV358A is chosen for its rail-to-rail input/output and low offset voltage. #### 2.2.5 Analog Ground and Digital Ground MCUs with internal ADCs typically have separate AGND and GND pins. Connecting these to a ground plane minimizes interference, as shown in Figure 2.16. Separating analog and digital grounds reduces coupling of digital noise into the analog circuit. External connections should be made via the shortest leads to minimize additional impedance. #### 2.2.6 I/O Fanout Current Since the LPC82x shares a single power supply pin, digital switching currents can interfere with the ADC. To mitigate this, avoid direct driving of large currents on I/O ports and consider using low-power modes for ADC acquisition.

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